Peilin Chen

Peilin Chen

Ph.D. in Electrical Engineering

Short Bio

Peilin (Leo) Chen is a Ph.D. candidate in the Electrical and Computer Engineering Department at the University of Virginia (UVA), advised by Prof. Xiaoxuan Yang. His research focuses on designing energy-efficient algorithms, architectures, and systems for AI workloads, including CNNs, LLMs, and neuromorphic deep learning models.

Prior to UVA, he earned his B.E. degree in Integrated Circuit Design and Integration System from Xidian University in 2024.

News

Jul 2026
One first-authored paper has been accepted to IEEE/ACM ICCAD 2026! See you in San Jose, California, USA 🎉!
May 2026
One first-authored paper has been accepted to IEEE/ACM ISLPED 2026 (Oral presentation)! See you in Evanston, Illinois, USA 🎉!
Apr 2026
One first-authored paper has been accepted to ACM GLSVLSI 2026! See you in Finger Lakes, NY, USA 🎉!
Jul 2025
Paper “Titanus: Enabling KV Cache Pruning and Quantization On-the-Fly for LLM Acceleration” wins Best Paper Award of GLSVLSI 2025 🎉!
Apr 2025
One first-authored paper has been accepted to ACM GLSVLSI 2025! See you in New Orleans, USA 🎉!
Apr 2025
Accepted as a DAC Young Fellow at the 62nd Design Automation Conference! See you in San Francisco, USA 🎉!
Dec 2024
One first-authored paper has been accepted to IEEE AICAS 2025! See you in Bordeaux, France 🎉!
Jun 2024
My dissertation, Design, logic synthesis and physical implementation of pipeline processor based on RISC-V architecture, has been selected as the excellent graduation project 🎉!
Feb 2024
I will be a Ph.D. student at the University of Virginia in Fall 2024 and have been awarded the UVA Provost's Fellowship 🎉!

Selected Research

Lonic: Algorithm-Hardware Co-Design for Energy-Efficient Fully Local Online SNN Training with INT4 Precision
Peilin Chen and Xiaoxuan Yang
ACM/IEEE International Conference on Computer-Aided Design (ICCAD), San Jose, California, USA, 2026.
Rank First in the Track
[paper]   [code]
Lonic
SpikON: A Dual-Parallel and Efficient Accelerator for Online Spiking Neural Networks Learning
Peilin Chen and Xiaoxuan Yang
ACM/IEEE International Symposium on Low Power Electronics and Design (ISLPED), Evanston, Illinois, USA, 2026.
Invited for IEEE TVLSI Extension
[paper]   [code]
SpikON
SpiKint: Native Full-Integer Spiking Neural Networks Training with an Efficient CIM-based Accelerator
Peilin Chen and Xiaoxuan Yang
ACM Great Lakes Symposium on VLSI (GLSVLSI), Finger Lakes, NY, USA, 2026.
[paper]   [code]
SpiKint
Titanus: Enabling KV Cache Pruning and Quantization On-the-Fly for LLM Acceleration
Peilin Chen and Xiaoxuan Yang
ACM Great Lakes Symposium on VLSI (GLSVLSI), New Orleans, USA, 2025.
Rank First in the Track · Best Paper Award
[paper]   [code]
Titanus
Optimizing and Exploring System Performance in Compact Processing-in-Memory-Based Chips
Peilin Chen and Xiaoxuan Yang
IEEE International Conference on Artificial Intelligence Circuits and Systems (AICAS), Bordeaux, France, 2025.
[paper]   [code]
Compact_PIM